1. Field of the Invention
The present invention relates to a method for fabricating a dielectric film for a semiconductor device, and in particular to an improved method for fabricating a dielectric film which can increase capacitance by etching a film generated by annealing for preprocess using NO gas.
2. Description of the Background Art
In a conventional semiconductor device, SiO2 has been used as a material of a dielectric film composing a capacitor. The SiO2 dielectric film is easy to fabricate and has superior interface characteristics with silicon. However, as an integration degree of the device is increased, a projected area of the capacitor in each cell is decreased. As a result, a soft error is generated and a refresh time is reduced.
Accordingly, various methods have been studied in order to sufficiently maintain capacitance of the capacitor of each cell even if an area of the memory cell is decreased. The research direction is divided into a structure research and material research. The structure research attempts to form a thin dielectric film and increase an effective surface area. The material research tries to replace the SiO2 dielectric film with (Ta2O5) and BST(Ba,Sr)TiO3) dielectric films having a high dielectric constant.
FIGS. 1(a) to 1(c) illustrate the sequential steps of the conventional method for fabricating the Ta2O, dielectric film.
As shown in FIG. 1(a), a first insulating film 3 consisting of nitride is formed on a silicon lower electrode 1 by a first annealing that is an annealing for preprocess. The first annealing is performed at the NH3 atmosphere by employing a rapid thermal process (RTP) device. A thickness of the first insulating film 3 formed after the first annealing is approximately 10 xc3x85. Here, the nitrogen in the first insulating film 3 is regularly spread on the entire surface of the first insulating film 3.
The first insulating film 3 prevents the silicon lower electrode 1 from being oxidized in a succeeding step. In addition, an Sixe2x80x94N bond that is a bond between the silicon composing the lower electrode 1 and the nitrogen composing the first insulating film 3 is formed at an interface of the silicon lower electrode 1 and the first insulating film 3 because of the first insulating film 3. When the Sixe2x80x94N bond is formed at the interface of the silicon lower electrode 1 and the first insulating film 3, the interface characteristics between the silicon lower electrode 1 and the first insulating film 3 are deteriorated, thereby increasing leakage current.
As depicted in FIG. 1(b), a second insulating film 5 consisting of Ta2O5 is formed on the first insulating film 3. Here, the first insulating film 3 prevents the surface of the silicon lower electrode 1 from being oxidized during a step for forming the second insulating film 5 consisting of Ta2O5.
As illustrated in FIG. 1(c), in order to improve the characteristics of the dielectric film, the structure as shown in FIG. 1(b) is annealed by a second annealing that is an annealing for postprocess. The second annealing is mostly carried out at the N2O atmosphere by using the RTP device.
The characteristics of the dielectric film are improved by the second annealing on the following grounds.
When the second annealing is performed at the N2O atmosphere, oxygen diffuses and penetrates into the first insulating film 3 from the atmosphere gas. If an oxide film is formed by the oxygen at the lower portion of the first insulating film 3, the Sixe2x80x94O bond is increased and the Sixe2x80x94N bond is decreased. Since the Sixe2x80x94O bond has superior interface characteristics to the Sixe2x80x94N bond, as the Sixe2x80x94O bond is increased at the interface between the silicon lower electrode 1 and the first insulating film 3, the interface characteristics are improved and the leakage current is reduced. In case the second annealing time is long, the Sixe2x80x94O bond is more increased. Accordingly, the leakage current may be more decreased by increasing the second annealing time.
However, the conventional method for fabricating the dielectric film has the following disadvantages.
Firstly, the capacitance is reduced by the first insulating film formed by the first annealing. The capacitance C of the capacitor is represented by the following Expression.
C=xcex5(A/t)
In the Expression, C, xcex5, A and t indicate the capacitance, the dielectric constant, a width of the dielectric film and a thickness thereof, respectively. As shown in the above Expression, as the thickness of the dielectric film is increased, the capacitance is decreased. Accordingly, the capacitance is reduced as many as the thickness of the dielectric film is increased by the first insulating film.
Secondly, the characteristics of the interface are deteriorated and the leakage current is increased due to the Sixe2x80x94N bond existing at the interface between the silicon lower electrode 1 and the first insulating film 3.
Thirdly, when the Sixe2x80x94N bond existing at the interface between the silicon lower electrode 1 and the first insulating film 3 is replaced by the Sixe2x80x94O bond according to the second annealing, the leakage current may be decreased. However, since the dielectric constant of the oxide film is smaller than that of the nitride film, the capacitance is reduced.
Accordingly, it is a primary object of the present invention to increase capacitance by decreasing a thickness of an insulating film formed on a silicon lower electrode and a thickness of a dielectric film.
It is another object of the present invention to reduce leakage current of a capacitor by improving characteristics of an interface between a silicon lower electrode and an insulating film.
It is still another object of the present invention to increase capacitance by using a dielectric film having a high dielectric constant.
In order to achieve the above-described objects of the present invention, there is provided a method for fabricating a dielectric film, including: a step for performing a first annealing on a silicon lower electrode, and forming a first insulating film on the upper surface of the silicon lower electrode; a step for etching the first insulating film; and a step for forming a second insulating film on the silicon lower electrode.